Phase-change electronic devices include memory devices, referred to herein as Ovonic Universal Memory (OUM). OUM cells utilize a class of materials that are reversibly switchable from one material phase to another with measurable distinct electrical properties associated with each phase. For example, these materials may change between an amorphous disordered phase and a crystalline, or polycrystalline, ordered phase, with a significant corresponding change in the thermal and electrical conductivity of the material. Such materials may also exhibit many substrates, each with associated discernible differences in their electrical properties.
Chalcogenide materials are typically employed as the phase change material used in OUM cells. A wide range of chalcogenide compositions has been investigated in an effort to optimize the performance characteristics of chalcogenic devices. Chalcogenide materials generally include a chalcogen element and one or more chemical or structural modifying elements. The chalcogen element (e.g. Te, Se, S) is selected from column VI of the periodic table and the modifying elements may be selected, for example, from column III (e.g. Ga, Al, In), column IV (e.g. Si, Ge, Sn), or column V (e.g. P, As, Sb) of the periodic table. The role of modifying elements includes providing points of branching or cross-linking between chains comprising the chalcogen element. Column IV modifiers can function as tetracoordinate modifiers that include two coordinate positions within a chalcogenide chain and two coordinate positions that permit branching or crosslinking away from the chalcogenide chain. Column III and V modifiers can function as tricoordinate modifiers that include two coordinate positions within a chalcogenide chain and one coordinate position that permits branching or crosslinking away from the chalcogenide chain. Embodiments in accordance with the principles of the present invention may include binary, ternary, quaternary, and higher order chalcogenide alloys. Examples of chalcogenide materials are described in U.S. Pat. Nos. 5,166,758, 5,296,716, 5,414,271, 5,359,205, 5,341,328, 5,536,947, 5,534,712, 5,687,112, and 5,825,046 the disclosures of which are all incorporated by reference herein. Chalcogenide materials may also be the resultant of a reactive sputtering process: a chalcogenide nitride, or oxide, for example and chalcogenide may be modified by an ion implantation or other process.
Early work in chalcogenide devices demonstrated electrical switching behavior in which switching from a resistive state to a conductive state was induced upon application of a voltage at or above the threshold voltage of the active chalcogenide material. This effect is the basis of the Ovonic Threshold Switch (OTS) and remains an important practical feature of chalcogenide materials. The OTS provides highly reproducible switching at ultrafast switching speeds for over 1013 cycles. Basic principles and operational features of the OTS are presented, for example, in U.S. Pat. Nos. 3,271,591; 5,543,737; 5,694,146; and 5,757,446; the disclosures of which are hereby incorporated by reference, as well as in several journal articles including “Reversible Electrical Switching Phenomena in Disordered Structures,” Physical Review Letters, vol. 21, p. 1450-1453 (1969) by S. R. Ovshinsky; “Amorphous Semiconductors for Switching, Memory, and Imaging Applications,” IEEE Transactions on Electron Devices, vol. ED-20, p. 91-105 (1973) by S. R. Ovshinsky and H. Fritzsche; the disclosures of which are hereby incorporated by reference.
Another important application of chalcogenide materials is in electrical and optical memory devices. One type of chalcogenide memory device utilizes the wide range of resistance values available for the material as the basis of memory operation. Each resistance value corresponds to a distinct structural state of the chalcogenide material and one or more of the states can be selected and used to define operation memory states. Chalcogenide materials exhibit a crystalline state, or phase, as well as an amorphous state, or phase. Different structural states of a chalcogenide material differ with respect to the relative proportions of crystalline and amorphous phase in a given volume or region of chalcogenide material. The range of resistance values is generally bounded by a set state and a reset state of the chalcogenide material. By convention, the set state is a low resistance structural state whose electrical properties are primarily controlled by the crystalline portion of the chalcogenide material and the reset state is a high resistance structural state whose electrical properties are primarily controlled by the amorphous portion of the chalcogenide material.
Intermediate sub-states corresponding to various degrees of amorphization (or crystallization), with corresponding discernible differences in electrical properties such as resistivity, may be used to increase the information density of each OUM cell. Each memory state of a chalcogenide memory material corresponds to a distinct resistance value and each memory resistance value signifies unique informational content. Operationally, the chalcogenide material can be programmed into a particular memory state by providing an electric current pulse of an appropriate amplitude and duration to transform the chalcogenide material into the structural state having the desired resistance. By controlling the amount of energy provided to the chalcogenide material, it is possible to control the relative proportions of crystalline and amorphous phase regions within a volume of the material and to thereby control the structural (and corresponding memory) state of the chalcogenide material to store information.
Each memory state can be programmed by providing the current pulse characteristics of the state and each state can be identified, or “read”, in a non-destructive fashion by measuring the resistance. Programming among the different states is fully reversible and the memory devices can be written and read over a virtually unlimited number of cycles to provide robust and reliable operation. The variable resistance memory functionality of chalcogenide materials is currently being exploited in the OUM (Ovonic Universal (or Unified) Memory) devices that are beginning to appear on the market. Basic principles and operation of OUM type devices are presented, for example, in U.S. Pat. Nos. 6,859,390; 6,774,387; 6,687,153; and 6,314,014; the disclosures of which are incorporated by reference herein, as well as in several journal articles including, “Low Field Amorphous State Resistance and Threshold Voltage Drift in Chalcogenide Materials,” published in EE transactions on Electron Devices, vol. 51, p. 714-719 (2004) by Pirovana et al.; and “Morphing Memory,” published in Science News, vol. 167, p. 363-364 (2005) by Weiss.
The behavior (including switching, memory, and accumulation) and chemical compositions of chalcogenide materials have been described, for example, in the following U.S. Pat. Nos. 6,671,710; 6,714,954; 6,087,674; 5,166,758; 5,296,716; 5,536,947; 5,596,522; 5,825,046; 5,687,112; 5,912,839; and 3,530,441, the disclosures of which are hereby incorporated by reference. These references present proposed mechanisms that govern the behavior of chalcogenide materials. The references also describe the structural transformations from the crystalline state to the amorphous state (and vice versa) via a series of partially crystalline states in which the relative proportions of crystalline and amorphous regions vary during the operation of electrical and optical chalcogenide materials.
The possibility of changing the phase of chalcogenic material from the amorphous to the crystalline state using electrical pulses is indeed not immediately apparent. In the amorphous state, the material resistivity is very high and the current flowing through the chalcogenic material would not allow a sufficient dissipation and thus a sufficiently high temperature. However, chalcogenic materials change their transport characteristics as a function of the applied electric field. Above a threshold voltage Vth, the structure begins to conduct, not because of a phase change, but because of a change in the electronic conduction mechanism. This behavior is called “electronic switching”; accordingly, biasing the chalcogenic structure to a voltage higher than the threshold voltage, it is possible to considerably increase the current flow. By directing this current through a suitable neighboring series resistor, which operates as a heater, it is thus possible to obtain, by Joule effect, a sufficient heating of the chalcogenic material for crystallization or amorphization.
For practical application, it is highly desirable that OUM cells be compatible with existing integrated circuit technologies, such as CMOS technology. In particular it would be highly advantageous for OUM cells to operate with the relatively limited current and withstand voltage values available from CMOS technology. For example, a CMOS technology that features a gate length of 130 nm and a gate oxide withstanding a power supply of 3 V, limit the maximum current that might be employed to switch an OUM cell to 100-200 μA. In order to achieve the necessary heating with such a limited current, the area in contact between the chalcogenic region and resistive electrode must be restricted to an area smaller than may be produced using conventional lithographic techniques. Several attempts have been made to achieve such reduction of chalcogenide regions.
The sectional views of FIGS. 1A through 1C will be used to discuss broad conceptual aspects of a phase-change electronics device in accordance with the principles of the present invention. FIG. 1B depicts a conventional volume of phase change material of length L, depth D, and height H. Typically, whether employed as an element within an OUM or OTS, the volume of phase change material (e.g. L×D×H) used in electronics devices has been produced in a manner that yields uniform electrical characteristics throughout the volume. Such uniformity is generally considered essential to proper and consistent operation of the millions of devices that may be co-located on a single chip, or wafer of electronics devices, that incorporate phase change volumes such as that of FIG. 1B.
One of the characteristics of the phase change that is typically uniform throughout the volume is its propensity for switching. By propensity for switching, or relative “activeness,” we mean, in the case of chalcogenide material used in an OUM, for example, the relative ease with which, when exposed to a voltage pulse, the chalcogenide material will be placed in the crystalline or amorphous state (or intermediate state), depending upon the magnitude and duration of the pulse. Without such uniformity; one device within an array might switch states at a much different level than another within an array; one array within an integrated circuit might switch at a much different level than other arrays within the integrated circuit; one integrated circuit might switch at a much different level than other integrated circuits within a wafer. Uniform switching of the devices and uniform switching characteristics of the materials are highly desirable characteristics. In the conventional phase change block of FIG. 1B, the composition of the phase change material and propensity for switching are substantially uniform throughout the volume L×H×D.
In order to reduce the current required to operate such a volume, a great deal of effort has been expended in reducing the volume of phase change material used in electronic devices: reduce the phase change material, reduce the amount of phase change material that must be heated. In FIG. 1A the dimensions L and D are reduced to the minimum feature size afforded by the device's associated manufacturing process, also referred to as the lithographic limit (e.g. LLith in FIG. 1A). Once minimum feature size limitations are encountered, other techniques that reduce the phase change material volume to less than that achievable by lithographic techniques may be employed. One example of such sublithographic approaches is the introduction of sidewall spacers within a phase change material pore, illustrated in FIG. 1C. With sidewalls 102 of a pore 100 formed at the lithographic limit, Llith, the volume of phase change material 106 within the pore would simply be the volume of the cylinder of height H and diameter LLith. Introduction of the sidewall spacers 104, which typically are composed of an insulating material, reduces the volume of phase change material within the pore by an amount equal to the volume of the sidewall spacers.
Another approach to reducing the current required to effect a phase change in the phase change material of a phase change electronics device, an approach that goes beyond volume reduction barriers imposed by lithographic limits, is to reduce the volume of phase change material that actually undergoes a phase change. That is, although a phase change device cell may include a volume L×H×D of phase change material, the volume of phase change material that actually undergoes a phase change may be only a fraction of that volume. By reducing this portion of the phase change material, referred to herein as the programmed volume, further reductions of operating current, may be achieved. To that end, resistive heaters 200 such as that shown in FIG. 2 have been employed to heat a localized area of phase change material 202 to reduce the programmed volume 204 of phase change material and thereby further reduce the current required for operation of a phase change device 206.
The introduction of a breakdown layer is meant to achieve a similar reduction in programmed volume by localizing current flow. Such approaches may involve the introduction of one or more additional layers to a phase change electronics device, with associated escalation in expense and, as with many increases in complexity, the potential for reduced reliability. For example, in order to form a current filament and thereby reduce the volume of phase change material that must undergo a phase change, some designs (including U.S. Pat. Nos. 6,992,369; 7,029,978; and 7,105,408, hereby incorporated by reference) introduce a “breakdown layer” between an electrode and the chalcogenide material and at least one (U.S. Pat. No. 7,029,978) requires supplemental processing in addition to that normally associated with the addition of a layer of material. In order to accommodate the limitations of existing integrated circuit technology, the ability to produce smaller operational features in phase change materials, as well as associated devices, such as Joule heating devices, would therefore be highly desirable.